What is the Difference between MOM, MIM and MOS Capacitors?

In analog IC circuit design, we will often use capacitors. The capacitors inside the chip generally use metal as the upper and lower substrates. However, the disadvantage of this metal capacitor is that it consumes too much area. In some circuits that do not require very high capacitance, some people have thought of using MOSFETs as alternative parts.

There are generally three types of integrated capacitors in CMOS technology, namely MIM capacitors, MOM capacitors, and MOS capacitors. Both ends of MIM and MOM capacitors are metal, with high linearity, which can be used for OPA compensation capacitors, etc. MOS capacitors generally require grounding or power at one end. The linearity of MOS capacitors is poor. Generally, it is used for larger capacitors filtering.

Ⅰ MIM capacitor

MIM capacitor (Metal-Insulator-Metal): MIM capacitor is equivalent to a parallel plate capacitor. The two-layer metal on the top layer has a large spacing, and the formed capacitor has a small capacitance value.

MIM capacitors are generally formed using two metal layers with a thin dielectric insulator between them. The structure of the MIM capacitor is as follows. The dielectric layer between CTM and Mt-1 is relatively thin, and the formed capacitor has a higher density.

MIM capacitors mainly use different layers of metals and the dielectric between them to form capacitors. MIM capacitor is shown below. The dielectric layer between the top metal (CTM) and the metal below (Mt-1) is relatively thin, resulting in a higher capacitance density.

MIM capacitor structure

Advantages of MIM capacitors:

Via connections can be used to connect odd-numbered layers (M9, M7, M5) and even-numbered layers (M8, M6, M4) respectively, increasing the capacitance per unit area.

MIM structure metal4-metal9

Disadvantages of MIM capacitors:

In a 65nm process, the unit area capacitance is limited (approximately 1.4fF/μm²) even when using specialized metal layers. The parasitic capacitance Cp can reach up to 10% of the total capacitance.

MIM circuit

Ⅱ MOM capacitor

MOM capacitors are typically formed by interdigitated metal fingers within the same metal layer. The structure is shown below. 

With advanced process technologies, metal traces can be placed closer together, and multiple metal layers can be utilized, resulting in higher capacitance density in advanced nodes.

Unlike MIM capacitors, MOM capacitors primarily use interdigitated structures within the same metal layer to create capacitance.

MOM structure

Advantages of MOM capacitors:

• High unit capacitance

• Low parasitic capacitor

• Symmetrical plane structure

• Excellent RF characteristics

• Excellent matching characteristics

• Compatible with metal wire process, no need to add additional process

In advanced CMOS manufacturing processes, MOM capacitors have become increasingly important capacitor structures. In 28nm processes and beyond, MOM capacitors are often the preferred choice for fixed capacitors due to their process compatibility and performance.

Ⅲ MOS capacitor

The MOS capacitor (metal-oxide-semiconductor) is the heart of the MOSFET structure. While the MOS capacitor itself is commonly used as a capacitive element in integrated circuits, it is also the core component of MOS transistors.

The gate capacitor of the MOS transistor can achieve a higher capacitor density. However, the capacitance value will vary with the difference of the gate voltage, which has a relatively large non-linearity. The transistor can work in the accumulation zone, depletion zone, and inversion zone.

A large number of inversion minority carriers are formed under the gate oxide layer in the inversion region, and a large number of multi-carriers are formed in the accumulation region. In these two areas, the MOS structure is similar to a parallel plate capacitor, and the capacitance is approximately equal to the gate oxide capacitor Cox.

The figure below shows how MOS capacitance varies with gate voltage. To achieve better linearity, MOS capacitors should operate in the inversion region, where Vgs > Vth.

Variation of MOS capacitance with gate voltage

The MOS capacitor is an important part of the transistor. Like the PN junction, the MOS capacitor also has two ports.

Physical structure

MOS capacitors can be divided into three layers, the upper layer is a gate made of metal, the lower layer is a substrate made of semiconductor, and the middle layer is filled with oxide, usually SiO2. It has only two ports, gate, and substrate. The schematic diagram is as follows:

MOS capacitor structure

P-type semiconductor MOS capacitor structure: The metal at the top, called the gate, applies a negative bias voltage to the P-type semiconductor on the substrate.

The metal end of the gate will accumulate negative charges and present an electric field in the direction indicated by the arrow in the figure below.

PMOS capacitor

The mechanism of the MOS capacitor formed by N-type semiconductor is similar to that of P-type semiconductor. The figure below is a schematic diagram of the structure of an N-type semiconductor MOS capacitor. When a forward bias voltage is applied at the gate level, a positive charge is generated at the gate level, a corresponding electric field is induced, and an electron accumulation layer is generated at the oxide-semiconductor interface.

NMOS capacitor

In some processes, in order to avoid inversion, special MOS transistors form MOS capacitors, and NMOS transistors are placed in the n-well.

That is, when the gate voltage is 0, the MOS tube is already turned on, and the threshold voltage Vth is close to 0. When Vgs>0, the capacitance value tends to be stable. This structure is called an accumulation type MOS capacitor, often called native MOS. The figure below shows the structure of this type of capacitor.

Accumulation type MOS capacitor structure

Principle of MOS capacitor

The main principle of MOS transistor: forming a capacitor is to use the gate oxide between the gate and the channel as the insulating medium, the gate as the upper plate, and the three ends of the source and drain and the substrate are shorted together to form the lower plate.

Its source and drain are connected to the ground with the sinking bottom, and there is a voltage source on the gate.

When the power of the gate is large enough to exceed the threshold voltage Vth, an inversion layer will appear between the source and the drain, that is, channel formation. In this way, the gate oxide acts as an insulating medium between the gate and the channel, and a capacitor is formed.

The unit area size of this capacitor is related to the thickness and dielectric constant of the gate oxide. If the gate voltage is a voltage lower than the ground, the N-type channel between the source and the drain cannot be formed at this time, but the holes of the P-type substrate will accumulate under the gate oxide.

In this way, a capacitor is still formed between the gate and the substrate. The insulating medium at this time is still the gate oxide, so the size of the capacitor at this time is the same as that when the channel is formed.

If the gate voltage can neither form a channel between the source and drain nor can it cause holes in the P-type substrate to accumulate on the top. At this time, it can be considered that a space charge region will be formed under the gate oxide. This space charge region is the region formed by the combination of electrons and holes, so it is not charged and is an "insulator."

From this, you should be clear that this "insulator" will be superimposed with the gate oxide insulator, resulting in an increase in the thickness of the equivalent insulating medium, so the capacitance value will decrease accordingly.

The advantages and disadvantages of MOS capacitors:

The main advantages of MOS capacitors are area-saving and convenience. The disadvantage is that the MOS capacitor is actually a "voltage-controlled capacitor". When the pressure difference between the upper and lower plates changes, the capacitance value will change accordingly. This is almost fatal in circuits that require high precision. In the front-end analog circuit of weak signal acquisition, MOS capacitors are not suitable.

Ⅳ Comparison of MIM, MOM, and MOS capacitors

MIM capacitors: similar to plate capacitors, the capacitance value is more accurate, and the capacitance value does not change with the bias voltage. Generally, mTOP l & mTOP -1 are used in the manufacturing process. The capacitance value can be estimated by the upper board area * unit capacitance value. The upper and lower plate connections are not interchangeable, and are generally used in analog and RF processes.

MOM capacitor: Interdigital capacitor, which uses C between the edges of the same layer of metal. In order to save the area, multiple layers of metal can be stacked, and the number of metal layers in PDK can be selected.

MOM capacitors are generally only used in advanced manufacturing processes of multilayer metals. Because it is realized through the layout of multilayer wiring, the determinism and stability of the capacitance value obtained are not as good as MIM. Generally, it may be used in applications that do not require high capacitance values.

MOS capacitor: MOS transistor with two ends structure, the capacitance value is not accurate. It can realize the capacitance value that changes with the change of the control voltage, and the connection of the upper and lower plates is not interchangeable.

Capacitance density comparison: For the same area, the relative capacitance densities typically follow the order: MIM < MOM < MOS. MIM capacitors generally provide about one-third the capacitance density of MOS capacitors.

A key advantage of MOM capacitors is that they require no additional masks or process steps, whereas MIM capacitors require additional masks and specialized process steps to implement.

Conclusion

In summary, MIM, MOM, and MOS capacitors are the main implementation alternatives in contemporary CMOS technology, and on-chip capacitors are crucial parts of integrated circuit design.  Each variety has unique benefits and drawbacks.

Because of their exceptional precision and linearity, MIM capacitors are perfect for applications like analog filters, sample-and-hold circuits, and radio frequency applications that need for steady, precise capacitance values.  They do, however, offer a lower capacitance density and necessitate extra steps in the process.
MOM capacitors offer a strong mix of performance and process compatibility.  They are economical because ordinary metal layers can be used to install them without the need for extra steps in the process.  In advanced nodes, its interdigitated construction enables a larger capacitance density than MIM capacitors, albeit with somewhat less accuracy.
For large capacitance values, MOS capacitors are space-efficient because they have the highest capacitance density.  However, because of their voltage-dependent nature, they can only be used in certain filtering applications and decoupling capacitors, where exact capacitance values are not necessary.
The circuit design's particular requirements, such as cost concerns, process technology limitations, available chip space, and precision requirements, will determine which of these capacitor types are best.  While MOS capacitors continue to be used in area-constrained designs where linearity is less crucial, MIM capacitors continue to be significant for precision analog applications, and MOM capacitors have gained popularity in modern advanced nodes (28nm and below) due to their advantageous balance of performance and process compatibility.

References

Bawedin, M., Cristoloveanu, S., & Flandre, D. (2019). SOI circuit design concepts. In F. Udrea & S. Cristoloveanu (Eds.), Handbook of SOI technology and devices (pp. 487-532). CRC Press. https://doi.org/10.1201/9781315152301

Bianchi, R. A., Bouche, G., & Roux-dit-Buisson, O. (2021). Innovative high-density MIM capacitor for advanced analog and RF applications. IEEE Transactions on Electron Devices, 68(3), 1301-1306. https://doi.org/10.1109/TED.2021.3049123

Cheng, Y., & Hu, C. (2018). MOSFET modeling & BSIM3 user's guide. Springer Science & Business Media.

Gupta, M., & Chan, M. (2022). Compact modeling of MOS capacitors for RF applications. IEEE Transactions on Electron Devices, 69(8), 4512-4518. https://doi.org/10.1109/TED.2022.3182407

Huang, J., & Schroder, D. K. (2019). MOS capacitors in advanced CMOS technology. In T. Mogami (Ed.), Advanced CMOS process technology (pp. 215-248). Springer.

Kar, S. (2020). High permittivity gate dielectric materials. Springer Nature.

Razavi, B. (2017). Design of analog CMOS integrated circuits (2nd ed.). McGraw-Hill Education.

Samudra, G., & Yeow, Y. T. (2018). Metal-oxide-metal capacitors for RF applications: Design considerations and modeling. IEEE Journal of the Electron Devices Society, 6(1), 459-467. https://doi.org/10.1109/JEDS.2018.2797951

Sedra, A. S., & Smith, K. C. (2020). Microelectronic circuits (8th ed.). Oxford University Press.

Tsividis, Y., & McAndrew, C. (2022). Operation and modeling of the MOS transistor (4th ed.). Oxford University Press.

Wang, L., & Chang, J. S. (2019). CMOS IC design for wireless medical and health care. Springer.

Zhao, W., & Cao, Y. (2021). New generation of predictive technology model for sub-45nm early design exploration. IEEE Transactions on Electron Devices, 68(5), 2575-2582. https://doi.org/10.1109/TED.2021.3063326


Last update time: 2025-04-17