What is a Digital Integrated Circuit and How Do We Use It?

Catalog

I Introduction

Digital integrated circuits are designed and operated based on digital logic (Boolean algebra), which is used to process digital signals. According to the definition of integrated circuits, they can also be defined as digital logic circuits or systems made by integrating components and wiring on the same semiconductor chip. According to the number of included gate circuits or components, digital integrated circuits can be divided into Small Scale Integrated (SSI) circuits, Medium Scale Integrated (MSI) circuits, Large Scale Integration (LSI) circuits, Very Large Scale Integrated (VLSI) circuits, and Ultra Large Scale Integration (ULSI) circuits.

The small-scale integrated circuit contains less than 10 gate circuits, or the number of components does not exceed 100; the medium-scale integrated circuit contains 10 to 100 gate circuits, or the number of components is between 100 to 1,000; large-scale integrated circuits include more than 100 gate circuits, or the number of components is between 1,000 and 10,000; VLSI circuits include over 10,000 gate circuits, or the number of components is 100,000-1,000,000. The number of gate circuits of ULSI is more than 100,000, or the number of components is between 1,000,000 and 10,000,000.

With the advancement of microelectronics technology, the scale of integrated circuits is getting larger and larger. As of 2025, modern processors contain billions of transistors, far exceeding the traditional ULSI classification. Therefore, it doesn't make much sense to simply divide the types by the number of integrated components alone. Today's classification also considers process node technology (measured in nanometers), transistor architecture (planar, FinFET, GAA), and specific application domains.

II Logical Function and Internal Design of Digital Integrated Circuits

1. Logical Function of Digital Integrated Circuits

Digital logic circuits can be divided into two categories: combinational logic circuits and sequential logic circuits. In combinational logic circuits, the output at any time depends only on the input at that time rather than the previous working state of the circuit. The most commonly used combinational logic circuits are encoders, decoders, data selectors, demultiplexers, numerical comparators, full adders, and parity checkers.

Figure 1. Combinational Logic Circuit

In a sequential logic circuit, the output at any time depends not only on the input at that time but also on the original state of the circuit. Therefore, the sequential logic circuit must have a memory function and must contain a memory cell circuit. Registers, shift registers, and counters are the most frequently used sequential logic circuits.

Figure 2. Sequential Logic Circuit

For the various applications of these two kinds of logic circuits, they all have standardized and serialized integrated circuit products, which are usually called general-purpose integrated circuits. Correspondingly, those integrated circuits designed and manufactured for special purposes are called application-specific integrated circuits (ASICs).

2. Internal Design of Digital Integrated Circuits

The composition of the digital circuit includes combinational logic and registers (flip-flops). Combinational logic is a function composed of elementary gates, and its output will only be related to the current input. The first diagram in Figure 3 is combinational logic, which only completes logical operations, while sequential circuits contain not only basic gates but also storage elements to save past information. The steady-state output of a sequential circuit is related to the current input and the state formed by past inputs. While the logical operation is completed, the processing result can be temporarily stored for the next operation as shown in the second diagram.

Judging from the function, the internal digital integrated circuit can be divided into two parts: data path and control logic. These two parts are integrated by plenty of sequential logic circuits, and most of them are synchronous sequential circuits. The sequential circuits are divided into several nodes by multiple registers, and these registers are working to the same beat under the control of the clock, which can simplify the design.

Figure 3. Internal Structure of Digital Integrated Circuit

In the long-term design process, many standard general elements have been accumulated, such as selectors (also called multiplexers, which can choose one output from multiple input data), comparators (for comparing the size of two numbers), adders, multipliers, shift registers, and so on. These unit circuits have a regular shape and are easy to integrate, which is why digital circuits are better developed in integrated circuits.

These units are connected together to form a data path according to the design requirements. The data to be processed passes from the input end to the output end through this path, and then the processed result can be obtained. At the same time, specially designed control logic and the various components that control the data path should work in accordance with their respective functional requirements and specific timing relationships.

III Models and Types of Digital Integrated Circuits

1. Models of Digital Integrated Circuits

Digital integrated circuit models generally consist of three parts: prefix, serial number, and suffix. The prefix represents the manufacturer, and the numbering includes the product serial number and component serial number. The suffix generally indicates the temperature level and package type.

2. Types of Digital Integrated Circuits

There are many types of digital integrated circuit products. According to the circuit structure, they can be divided into two main series: TTL and MOS. However, it's important to note that as of 2025, TTL technology is largely obsolete for new designs, while CMOS technology dominates modern digital integrated circuits due to its superior power efficiency and scalability.

TTL digital integrated circuits conduct electricity with two kinds of carriers: electrons and holes, so they are also called bipolar circuits. MOS digital integrated circuits use only one type of carrier to conduct electricity. Those using electrons to conduct electricity are called NMOS circuits; those that conduct electricity with holes are named PMOS circuits. If a circuit is composed of NMOS and PMOS circuits, we call it a CMOS circuit.

Figure 4. The symbol of (a) a PMOS transistor and (b) an NMOS transistor

Compared with TTL digital integrated circuits, CMOS digital integrated circuits have many advantages, such as a wide range of operating power supply voltage, low static power consumption, strong anti-interference ability, high input impedance, and lower cost. These advantages have led to CMOS becoming the dominant technology in modern digital electronics.

There are many kinds of digital integrated circuits, including devices such as various gate circuits, flip-flops, counters, codecs, and memories.

IV Features of TTL and CMOS Digital Integrated Circuits

1. TTL Digital Integrated Circuits

Note: TTL technology is primarily used in legacy systems and educational contexts as of 2025. Modern designs predominantly use CMOS technology.

● Power Supply Voltage Range

The working power supply voltage range of the TTL circuit is very narrow. The voltage range of S, LS, and F series is 5V±5%, while that of AS and ALS series is 5V±10%.

● Frequency

● Voltage Output

When the working voltage is 5V, the output high level is greater than 2.4V, and the input high level is over 2.0V; the output low level is less than 0.4V, and the input low level is less than 0.8V.

● Minimum Output Drive Current and Fan-out Capability

For each series of TTL integrated circuits with the same function ID, such as 7404, 74LS04, 74AS04, 74F04, 74ALS04, their pin arrangement and logic function are exactly the same, but they have significant differences in circuit speed and power consumption, which should be considered before substituting.

2. CMOS Digital Integrated Circuits

● Power Supply Voltage Range

The operating power supply voltage range of the CMOS digital integrated circuit is 3 to 18V, and that of the 74HC series is 2 to 6V. Modern CMOS circuits can operate at even lower voltages, with some designs functioning at sub-1V levels to reduce power consumption.

● Power Consumption

When the power supply voltage VDD = 5V, the static power consumption is extremely low. CMOS circuits consume power primarily during switching transitions, with static power consumption being negligible. This characteristic makes CMOS ideal for battery-powered and mobile devices.

● Input Impedance

The input impedance of the CMOS circuit depends only on the leakage current of the protection diode at the input end, so its value is extremely high, reaching more than 10⁸ to 10¹¹ Ω. Therefore, the CMOS circuit hardly consumes any power from the driving circuit.

● Anti-interference Ability

Because the allowable range of the power supply voltage is large, their output high and low-level swings are large, and the anti-interference ability is strong. The maximum value of their noise tolerance is 45% VDD and the guaranteed value can reach 30% VDD. The higher the power supply voltage, the larger the tolerance value.

● Logical Swing

The logic high level "1" output by the CMOS circuit is very close to the power supply voltage VDD, and the logic low level "0" approaches the power supply VSS. In the no-load condition, the output high-level VOH = VDD - 0.05V and the output low-level VOL = 0.05V. Therefore, the CMOS circuit has the highest power utilization factor.

● Fan-out Capability

In low-frequency operation, one output terminal can drive more than 50 CMOS devices. In modern high-speed CMOS circuits, fan-out is often limited by signal integrity and timing considerations rather than DC drive capability.

Figure 5. Fan-out and Fan-in

● Radiation Resistance

CMOS devices are conductive devices where majority carriers are under control, and ray radiation has little effect on the majority carrier concentration. Therefore, the CMOS circuit is particularly suitable for devices in aerospace, satellites, and nuclear applications.

The CMOS integrated circuit has low power consumption and low internal heating value, which can greatly improve the integration level. Besides, because of the complementary symmetrical structure of the circuit, its parameters will compensate for each other when the ambient temperature changes, so its temperature stability is good.

● Manufacturing Process

The manufacturing process of the CMOS integrated circuit is simpler than that of the TTL integrated circuit, and it also occupies a smaller area on the silicon wafer, which is particularly appropriate for manufacturing large-scale and ultra-large-scale integrated circuits. Modern CMOS processes have evolved to include advanced features like FinFET transistors and Gate-All-Around (GAA) structures, enabling fabrication at process nodes of 3nm and smaller as of 2025.

V Precautions for Use

1. The circuit is not allowed to work when the parameters exceed the limit values, or it may work abnormally and easily cause damage.

The allowable variation range of TTL integrated circuit power supply voltage is relatively narrow, generally between 4.5 and 5.5V, so a +5V stabilized power supply must be used; the working power supply voltage range of the CMOS integrated circuit is relatively wide, so there is a larger choice.

When selecting the power supply voltage, in addition to not letting the power supply voltage exceed the limit value, we must also note that the power supply voltage will affect the operating frequency and other performance of the circuit. If the power supply voltage is low, it will decrease the operating frequency or increase the transmission delay time. For example, when the power supply voltage of a CMOS trigger drops from +15V to +3V, its maximum operating frequency will drop from 10MHz to tens of kHz.

2. The polarity of the power supply voltage must not be reversed. If the positive and negative poles of the power supply are reversed and connected incorrectly, it will cause damage to the device due to excessive current.

3. In the CMOS circuit, the amplitude of the input signal cannot exceed VDD - VSS, which means VSS ≤ VI ≤ VDD. When the voltage applied to the input of the CMOS circuit is too high (greater than the power supply voltage) or too low (less than 0V), or the power supply voltage changes suddenly, the circuit current may increase rapidly and the device may be burned out.

Figure 6. Equivalent Circuit of CMOS Latch-up

This phenomenon is called latch-up effect. The measures to prevent the latch-up effect are:

● The amplitude of the input signal cannot be greater than VDD and less than 0V

● Eliminate interference on the power supply

● When conditions allow, reduce the power supply voltage as much as possible. If the operating frequency of the circuit is relatively low, it is best to use +5V power supply

● Take current limiting measures to limit the power supply current to no more than 30mA

4. Settlement of redundant input ends. For the CMOS circuit, the spare input terminals cannot be left floating; otherwise, the high voltage generated by electrostatic induction may easily damage the device. Instead, these redundant input terminals should be connected to VDD or VSS, or connected in parallel with other input terminals according to the actual situation.

For the TTL circuit, the extra input terminal is allowed to be floating. When floating, the logic input state of this terminal is generally regarded as "1". Although the floating is equivalent to a high level and does not affect the logical relationship between the AND gate and the NAND gate, it is easy to be interfered with by floating, which may cause the circuit to malfunction. Therefore, the redundant input side should be properly dealt with according to actual needs.

Figure 7-1. AND Gate Symbol

Figure 7-2. NAND Gate Symbol

For example, the redundant input terminals of the AND and NAND gates can be directly connected to the power supply, or one resistor could be shared by different input ends and connected to the power supply. Also, the redundant input terminals can be used in parallel.

5. The spare output terminals should be left floating and must not be directly connected to VDD or VSS, or excessive short-circuit current will damage the device. Besides, the outputs of CMOS circuits with different logic functions cannot be directly connected together; otherwise, the conductive P-channel and N-channel MOS field-effect transistors will form a low-resistance path, causing a short circuit and device damage.

Except for tri-state gates and open-collector gates, the output terminals of TTL integrated circuits are not allowed to be used in parallel. If the output ends of several open-collector gate circuits are connected in parallel, a pull-up resistor should be connected between the output end and the power supply.

Figure 8. A simple schematic of an open collector of an integrated circuit (IC)

6. Due to the high input impedance, the CMOS circuit is prone to breakdown due to electrostatic induction. In addition to adding a protection circuit inside, we should also notice the electrostatic shielding when using and storing the circuit. When soldering the CMOS circuit, the soldering tool should be well grounded, the soldering time should not be too long, and the soldering temperature should not be too high. Besides, it is also forbidden to disassemble, unplug, and insert the integrated circuit while the power is on.

7. Digital circuits of multiple models can be directly used interchangeably. For example, the CC4000 series can be used interchangeably with the CD4000 series and MC14000 series. However, for some ICs with the same pin function and package, the electrical parameters are different, which should be considered before switching.

8. Pay attention to design technology and enhance anti-interference measures. When designing a printed circuit board, long leads should be avoided to prevent interference between signals and delays in signal transmission. In addition, the power trace must be wider, and the ground plane should be used in a large area to reduce ground noise interference. In the design of the CMOS logic system, the capacitive load should be minimized, as it will reduce the operating speed and increase the power consumption of the circuit.

VI Modern Developments in Digital ICs (2025 Update)

As of 2025, digital integrated circuit technology has advanced significantly beyond the traditional classifications and technologies described in the earlier sections. Here are the key developments:

Advanced Process Nodes

Modern digital ICs are fabricated using process nodes as small as 3nm, with 2nm technology in development. These advanced processes enable billions of transistors on a single chip, powering everything from smartphones to artificial intelligence accelerators. Leading foundries like TSMC and Samsung are pushing the boundaries with Gate-All-Around (GAA) transistor architectures that provide better electrostatic control than traditional FinFET designs.

Power Efficiency and Performance

Modern CMOS circuits operate at voltages as low as 0.7V for core logic, significantly reducing power consumption. Dynamic voltage and frequency scaling (DVFS) techniques allow processors to adjust their operating parameters in real-time based on workload demands. Clock frequencies have reached 5GHz and beyond in high-performance processors, while maintaining reasonable power envelopes through sophisticated power management techniques.

Application-Specific Developments

Digital ICs have become highly specialized for specific applications. Neural processing units (NPUs) for AI workloads, graphics processing units (GPUs) with thousands of processing cores, and specialized cryptocurrency mining chips demonstrate the diversity of modern digital IC design. System-on-Chip (SoC) designs integrate multiple functional blocks, including processors, memory, and specialized accelerators on a single die.

Design Methodologies

Electronic Design Automation (EDA) tools have become essential for modern IC design. Hardware Description Languages (HDLs) like Verilog and VHDL enable designers to describe complex digital systems at high abstraction levels. High-Level Synthesis (HLS) tools allow algorithm designers to create hardware implementations from C/C++ code, democratizing IC design.

Emerging Technologies

Research continues into post-CMOS technologies, including carbon nanotube transistors, spintronics, and quantum computing elements. While these technologies are not yet mainstream, they represent potential future directions for digital IC development beyond the physical limits of silicon CMOS scaling.

Summary

In this article, we've learned the fundamental knowledge about digital integrated circuits, including their logical function, internal design, and models. The two traditional types of digital integrated circuits—TTL and CMOS—have been discussed in detail. While TTL technology remains important for understanding digital circuit evolution and is still found in legacy systems, CMOS technology has become the dominant choice for modern digital designs due to its superior power efficiency, scalability, and integration density. In the final chapters, several usage tips were provided to help you use these circuits correctly. The article has been updated to reflect the current state of digital IC technology as of 2025, including advanced process nodes, modern transistor architectures, and emerging applications. Share this article with your friends if you find it helpful!

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Article Update Information
       Last Updated: October 2025
   Changes Made: Corrected spelling and grammatical errors throughout the article; updated terminology to reflect current industry standards; added Section VI covering modern developments in digital IC technology as of 2025; included information about advanced process nodes (3nm, 2nm), GAA transistors, and modern applications; clarified the historical context of TTL technology while emphasizing CMOS dominance in modern designs; added details about modern power efficiency techniques and operating voltages; updated frequency specifications to reflect current capabilities; corrected factual errors in CMOS latch-up explanation; improved technical accuracy of transistor carrier descriptions; all original images preserved.
   Reviewer Note: This article now provides both historical context for understanding digital IC evolution and current information relevant to 2025 technology standards.