DoD Allocates $238 Million for Semiconductor Centers under CHIPS and Science Act
The U.S. Department of Defense (DoD) has announced a substantial $238 million funding allocation to eight Microelectronics Commons “regional innovation hubs” across the country. This is the largest allocation under President Biden's CHIPS and Science Act to date. The initiative, led by Deputy Secretary of Defense, Kathleen Hicks, aims to expedite the transition from lab-based R&D to full-scale production of microelectronic technologies. The selected sites include the Northeast Microelectronics Coalition (NEMC) Hub, Silicon Crossroads Microelectronics Commons (SCMC) Hub, California Defense Ready Electronics and Microdevices Superhub (California DREAMS), Commercial Leap Ahead for Wide Bandgap Semiconductors (CLAWS) Hub, Southwest Advanced Prototyping (SWAP) Hub, Midwest Microelectronics Consortium (MMEC) Hub, Northeast Regional Defense Technology Hub (NORDTECH), and California-Pacific-Northwest AI Hardware Hub (Northwest-AI Hub). Over 360 organizations from more than 30 states are set to participate in the Microelectronics Commons program, which has been allocated $2 billion for 2023-2027. The program focuses on six technology areas, including Secure Edge/IoT Computing, 5G/6G, AI Hardware, Quantum Technology, Electromagnetic Warfare, and Commercial Leap Ahead Technologies. Each hub is expected to become self-sufficient within five years and contribute to the DoD’s mission-critical technologies. This funding allocation reflects the U.S. government's concentrated effort to strengthen domestic semiconductor manufacturing and research, which is critical to numerous industries, ranging from defense to consumer electronics. The hubs are also responsible for creating educational pipelines and retraining initiatives, suggesting the goal is to nurture a highly skilled workforce to support the specialized needs of microelectronics development and production.
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The BSPDN Revolution: Overcoming IR Drop in Sub-2nm GAAFET Nodes with Backside Power DeliveryUTMEL25 June 2026797As semiconductor manufacturing enters the sub-2nm era, Backside Power Delivery Networks (BSPDN) are replacing traditional front-side routing to overcome critical IR drop bottlenecks. By separating power and signal delivery, chipmakers like Intel and TSMC drastically improve performance and density in GAAFET designs. However, this radical shift introduces manufacturing complexities, thermal challenges, and demands advanced packaging and power management solutions.
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Power Management ICs Trends 2026: AI Demand, Supply Risks, and Sourcing StrategiesUTMEL06 July 20261266As AI server racks surpass 100kW by 2026, data centers are shifting toward wide-bandgap semiconductors like SiC and GaN. However, this demand has triggered a critical shortage of mature-node Power Management ICs (PMICs). To prevent production halts, sourcing teams must abandon 'just-in-time' models, implement proactive 'just-in-case' strategies, and rapidly qualify pin-to-pin alternative components to secure their supply chains.
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onsemi Synaptics Acquisition Impact: BOM Risk Checklist and Second-Source Strategy for Edge AI DesignsUTMEL27 July 2026288The onsemi acquisition of Synaptics provides hardware program managers a 12-to-18-month window before potential product cancellations occur in mid-2027. This guide outlines how to audit BOM exposure across overlap and non-core product lines, calculate Last-Time-Buy volumes including hidden storage costs, establish proactive second-sourcing triggers, and implement supply chain monitoring to prevent line-down events.
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