What is the DC Bias Characteristic of a Capacitor？

One of the most widely utilized passive components in circuits is the capacitor. They possess traits like frequency and bias voltage. Many pupils are unaware of the significance of the bias voltage characteristics. It is simple to mine pits, and this precaution is not emphasized in the school textbook. This section introduces the impact of the bias characteristics of the capacitor using an actual capacitor as an example.

It is also known as the bias characteristic of the capacitor, and some people refer to it as the DC voltage characteristic of the capacitor. If a DC voltage is added to both ends of the capacitor, the capacitance value will drop as the DC voltage rises, as illustrated in the figure below. It is a capacitor with the name GRT155C81C105KE13 bias voltage characteristic curve, a 1uF capacitor in a 0402 package. The capacity of the capacitor rapidly declines as the DC voltage rises, as shown in the left image. How can the impact of this parameter be understood more intuitively when the voltage across the capacitor is 4V and the 1uF capacitor has decreased by 33.6 percent to become 1*(1-0.336)=0.664uF? How can bias voltage be eliminated from actual circuit design applications?

Figure. 1

The introduction will be clearer if we use the first-order RC low-pass filter circuit as an example. The first-order RC low-pass filter in the figure below has a resistance of 1K, a capacitor of 1uF, and a cut-off frequency of Fc=1/(2** R*C)=160Hz, which means that when a sinusoidal signal with a frequency of 160Hz is input at 1Vpp, the output signal will be attenuated by 3dB, the peak-to-peak value will change to 0.7Vpp, the signal with a The identical capacitor and circuitry are still in use in the second row. The only distinction is the input signal. A 4V DC bias is now overlaid on the input signal. It is clear from the bias voltage graph above that the capacitor's capacitance value is decreasing. 33.6 percent makes it 0.664uF, changing the cutoff frequency to 241Hz. The input signal is a sinusoidal waveform with a frequency of 241Hz@1Vpp, while the theoretical output frequency is 241Hz@0.7Vpp.

Figure. 2

I'm aware that everyone prefers practice over the theoretical introduction. I'll then test the circuit itself after that. The test setup and procedure are pretty straightforward. two different types of experiments are conducted with a 1uF capacitance value. Both experiments involve loading a 1Vpp sine signal at the input end, scanning the signal frequency from 1Hz to 10KHz, collecting the waveform at the output end, and drawing the gain curve (Bode diagram). This The network analyzer is built on this idea and uses a procedure known as frequency sweeping. The sole distinction between the two tests is that the second test will superimpose a 4V DC signal while test 1's signal is a pure AC signal.

The test result for test 1 is shown in the image below. The cutoff frequency should theoretically be 160Hz based on calculations using the 1K resistor and 1uF capacitor. The output signal is on the second line, and the input signal is on the first line at 160Hz@1Vpp. As can be seen, the attenuation of 1Vpp is 0.7Vpp at the 160Hz cutoff frequency, which is consistent with the earlier theoretical estimate. The gain curve graph's third line shows a sweep frequency of 1Hz to 10KHz with a -3dB frequency point at 160Hz, which is compatible with the findings of the preceding theoretical research.

Figure. 3

The test result for test 2 is shown in the image below. The identical capacitor and resistor are used as in test 1. 1K of resistance and 1uF of capacitance are present. The capacitance should decrease to 0.664uF theoretically due to the superimposed 4V DC power. The 1K resistance and 0.664uF indicate that Theoretically, 241Hz should be the cutoff frequency for calculations involving capacitors. A 4V DC signal is overlaid on the input 260Hz@1Vpp sinusoidal signal on line one, and the output signal is on line two. As can be observed, the attenuation of 1Vpp at the 260Hz cutoff frequency is 0.7Vpp, which is very similar to the theoretical study at 241Hz above. The -3dB frequency point position is at 260Hz on the third line of the gain curve graph, which is essentially the same as the 241Hz of the prior theoretical study result. The scanning frequency ranges from 1Hz to 10KHz.

Figure. 4

The two experiments mentioned above show that, for a given resistance and capacitance, the real capacitance value will be impacted if a DC voltage is superimposed on the input signal. The bias voltage band's cut-off frequency varies depending on the input signals used. As a result, a high number of parallel-connected, big-capacity capacitors are typically employed in the power supply. When a signal is amplified, if the signal from the rear stage contains a bias voltage, the bias voltage's influence should also be taken into account, and a suitable capacitor should be used. Normal requirements for this are low for positive and negative bipolar bidirectional power supplies, but higher for single power supplies. The signal in the acquisition circuit typically varies based on Vcc/2. The circuit design must take this DC voltage into full account.

Note: The bias voltage of the actual capacitor cannot be replicated by standard circuit simulation tools. For instance, 1uF in the simulation software will remain 1uF regardless of how the DC bias voltage changes. It should be mentioned that!

For instance, 1K and 1uF are still present in the circuit simulation shown in the picture below. The 3dB cut-off frequency, which is always 160Hz regardless of the amount of the superimposed DC signal, makes the simulation only functional. The secret lies in the accumulation of rich theoretical guiding principles and practical experience in actual implementations.

Figure. 5