Kyoto University Successfully Demonstrates That SiC Can Also Work at 350°C

Kyoto University (KU) recently announced that it has successfully demonstrated basic operation at high temperatures of 350°C, where Si semiconductor integrated circuits cannot operate, using SiC semiconductor integrated circuits.

The result is based on the research team of Assistant Professor Bright Kaneko and Professor Tsunobu Kimoto at the Graduate School of Engineering, Kyoto University. Details were presented on March 25 at the "69th Japan Society of Applied Physics Spring Lecture Meeting" held online from March 22 to 26 at Aoyama Gakuin University Sagamihara Campus.

It is said that Si semiconductors fail at about 250°C and cannot operate in higher temperatures. Therefore, it is expected to use SiC integrated circuits that have better heat resistance and can operate even at about 800°C. However, if structures similar to transistors in Si integrated circuits are fabricated from SiC, the characteristics will be difficult to control reliability in high-temperature environments due to SiC-specific defects, and there are problems of high power consumption.

To solve these problems, transistors for SiC integrated circuits with structures different from MOSFETs in Si integrated circuits are being developed, in which JFETs do not have physical interface defects in the current flow region as MOSFETs do. Therefore, it is promising as a transistor that constitutes a SiC integrated circuit with high-temperature action.

However, JFETs fabricated by the general method require large standby power and low power consumption because they cannot form a complementary circuit with a combination of n-type and p-type on the same substrate as MOSFETs, and conversion is required.

Schematic diagram of an n-type JFET fabricated by the general method (crystal growth)

(Source: Kyoto University Press Release PDF)

In this context, the research team has proposed a unique transistor structure and circuit configuration. It is said to have successfully demonstrated the operation of SiC logic gates from room temperature to 350°C with low power consumption.

There are two points of implementation. The first is the realization of a technique to fabricate both n-type and p-type on the same substrate, which is not possible with conventional general-purpose JFET fabrication methods. It is said to have succeeded in producing both n-type and p-type JFETs on the same substrate by performing ion implantation for local conductivity type control of the entire device structure.

Schematic diagram of n-type and p-type JFETs produced by the proposed method (ion implantation) (Source: Kyoto University Press Release PDF)

The second is that the JFET achieves a normally-off type characteristic, i.e., a characteristic that does not allow current to flow as a transistor when no voltage is applied to the gate terminal. This characteristic is also said to be difficult to achieve by the general JFET fabrication method, but by using a dual-gate structure, which constitutes the gate region by clamping the channel region from both sides, a normally off-type JFET can be fabricated. is said to have been accomplished.

It has been confirmed that the fabricated complementary JFETs operate normally in the temperature range from room temperature to 350°C, and that the power consumption in the standby state can be suppressed to a maximum of a few tens of nW or less.

The research team explained that the advantage of this research is that the circuit presented here can be fabricated using standard processes for SiC semiconductors as power semiconductors, but we will continue with MOSFETs, and further fundamental research is needed to determine if JFETs can be made smaller, faster, and more precise by miniaturization, and continued research is needed.

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