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KSZ9893R Gigabit Ethernet Switch: Pinout, Equivalent and Datasheet

Q: How does KSZ9893R configure the different modes of the device?

The KSZ9893R utilizes configuration strap pins to configure the device for different modes. These strap pins are configured by using external pull-up/down resistors to create a high or low state on the pins which are sampled at the end of a device power-up or software reset cycle.

Q: Does KSZ9893R support full access to all device registers?

The KSZ9893R supports a slave mode SPI interface that provides complete access to all device registers via an SPI master device.

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Published: 17 February 2022 | Last Updated: 17 February 2022

2577

KSZ9893RNXC

Microchip Technology

Controllers Interface ICs QUAD KSZ9893 0.4mm 64-VFQFN Exposed Pad

Unit Price: $26.531931

Ext Price: $26.53

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Controllers Interface ICs QUAD KSZ9893 0.4mm 64-VFQFN Exposed Pad

The KSZ9893R is a highly-integrated, IEEE 802.3 compliant networking device that incorporates a layer-2+ managed Gigabit Ethernet switch, two 10BASE-T/100BASE-TX/1000BASE-T physical layer transceivers (PHYs) and associated MAC units, and one MAC port with a configurable RGMII/MII/RMII interface for direct connection to a host processor/controller, another Ethernet switch, or an Ethernet PHY transceiver. Furthermore, Huge range of Semiconductors, Capacitors, Resistors and IcS in stock. Welcome RFQ.

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KSZ9893R Pinout

The following figure is the diagram of KSZ9893R pinout.

Pinout

KSZ9893R CAD Model

The followings are KSZ9893R Symbol, Footprint, and 3D Model.

PCB Symbol.png

PCB Symbol

PCB Footprint.png

PCB Footprint

3D Model

KSZ9893R Overview

The KSZ9893R is a highly-integrated, IEEE 802.3 compliant networking device that incorporates a layer-2+ managed Gigabit Ethernet switch, two 10BASE-T/100BASE-TX/1000BASE-T physical layer transceivers (PHYs) and associated MAC units, and one MAC port with a configurable RGMII/MII/RMII interface for direct connection to a host processor/controller, another Ethernet switch, or an Ethernet PHY transceiver. A host processor can access all KSZ9893R registers for control over all PHY, MAC, and switch functions. Full register access is available via the integrated SPI or I2C interfaces, and by in-band management via any one of the data ports. The KSZ9893R is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature ranges. The KSZ9893R device supports the IEEE 802.3 MII management interface, also known as the management data input/output (MDIO) interface. This interface allows upper-layer devices to monitor and control the states of the KSZ9893R PHY blocks, but it does not provide access to the switch registers.

This article provides you with a basic overview of the KSZ9893R Gigabit Ethernet Switch, including its pin descriptions, features and specifications, etc., to help you quickly understand what KSZ9893R is.

KSZ9893R Features

● Switch Management Capabilities

◆ 10/100/1000Mbps Ethernet switch basic functions: frame buffer management, address look-up table, queue management, MIB counters

◆ Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing 4096 entry forwarding table with 128kByte frame buffer

◆ Jumbo packet support up to 9000 bytes

◆ Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port

◆ MIB counters for fully-compliant statistics gathering 34 counters per port

◆ Tail tagging mode (one byte added before FCS) support at host port to inform the processor which ingress port receives the packet and its priority

◆ Loopback modes for remote failure diagnostics

◆ Rapid spanning tree protocol (RSTP) support for topology management and ring/linear recovery

◆ Multiple spanning tree protocol (MSTP) support

● Two Robust Integrated PHY Ports

◆ 1000BASE-T/100BASE-TX/10BASE-T IEEE 802.3

◆ Fast Link-up option significantly reduces link-up time

◆ Auto-negotiation and Auto-MDI/MDI-X support

◆ Energy-Efficient Ethernet (EEE) support with lowpower idle mode and clock stoppage

◆ On-chip termination resistors and internal biasing for differential pairs to reduce power

◆ LinkMD® cable diagnostic capabilities for determining cable opens, shorts, and length

● One Configurable External MAC Port

◆ Reduced Gigabit Media Independent Interface (RGMII) v2.0

◆ Reduced Media Independent Interface (RMII) v1.2 with 50MHz reference clock input/output option

◆ Media Independent Interface (MII) in PHY/MAC mode

● Advanced Switch Capabilities

◆ IEEE 802.1Q VLAN support for 128 active VLAN groups and the full range of 4096 VLAN IDs

◆ IEEE 802.1p/Q tag insertion/removal on per port basis

◆ VLAN ID on per port or VLAN basis

◆ IEEE 802.3x full-duplex flow control and half-duplex back pressure collision control

◆ IEEE 802.1X (Port-Based Network Access Control)

◆ IGMP v1/v2/v3 snooping for multicast packet filtering

◆ IPv6 multicast listener discovery (MLD) snooping

◆ IPv4/IPv6 QoS support, QoS/CoS packet prioritization

◆ 802.1p QoS packet classification with 4 priority queues

◆ Programmable rate limiting at ingress/egress ports

◆ Broadcast storm protection

◆ Four priority queues with dynamic packet mapping for IEEE 802.1p, IPv4 DIFFSERV, IPv6 Traffic Class

◆ MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets

◆ Self-address filtering for implementing ring topologies

● Comprehensive Configuration Registers Access

◆ High-speed 4-wire SPI (up to 50MHz), I²C interfaces provide access to all internal registers

◆ MII Management (MIIM, MDC/MDIO 2-wire) Interface provides access to all PHY registers

◆ In-band management via any of the three ports

◆ I/O pin strapping facility to set certain register bits from I/O pins at reset time

◆ On-the-fly configurable control registers

● Power Management

◆ IEEE 802.3az Energy Efficient Ethernet (EEE)

◆ Energy detect power-down mode on cable disconnect

◆ Dynamic clock tree control

◆ Unused ports can be individually powered down

◆ Full-chip software power-down

◆ Wake-on-LAN (WoL) standby power mode

KSZ9893R Highlights

• Non-blocking wire-speed Ethernet switching fabric

• Full-featured forwarding and filtering control, including Access Control List (ACL) filtering

• Full VLAN and QoS support

• Two ports with integrated 10/100/1000BASE-T PHYs

• One port with 10/100/1000 Ethernet MAC and configurable RGMII/MII/RMII interface

• IEEE 802.1X port-based authentication support

• EtherGreen™ power management features, including low power standby and IEEE 802.3az

• Flexible management interface options: SPI, I²C, MIIM, and in-band management via any port

• Commercial/Industrial temperature range support

• 64-pin VQFN (8 x 8mm) lead-free package

Specifications

Microchip Technology KSZ9893RNXC technical specifications, attributes, parameters and parts with similar specifications to Microchip Technology KSZ9893RNXC.

Type
Parameter
Factory Lead Time
7 Weeks
Package / Case
refers to the protective housing that encases an electronic component, providing mechanical support, electrical connections, and thermal management.
64-VFQFN Exposed Pad
Surface Mount
having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.
YES
Operating Temperature (Max.)
70°C
Usage Level
Automotive grade
Packaging
Semiconductor package is a carrier / shell used to contain and cover one or more semiconductor components or integrated circuits. The material of the shell can be metal, plastic, glass or ceramic.
Tray
Part Status
Parts can have many statuses as they progress through the configuration, analysis, review, and approval stages.
Active
Moisture Sensitivity Level (MSL)
Moisture Sensitivity Level (MSL) is a standardized rating that indicates the susceptibility of electronic components, particularly semiconductors, to moisture-induced damage during storage and the soldering process, defining the allowable exposure time to ambient conditions before they require special handling or baking to prevent failures
1 (Unlimited)
Number of Terminations
64
HTS Code
HTS (Harmonized Tariff Schedule) codes are product classification codes between 8-1 digits. The first six digits are an HS code, and the countries of import assign the subsequent digits to provide additional classification. U.S. HTS codes are 1 digits and are administered by the U.S. International Trade Commission.
8542.39.00.01
Terminal Position
In electronic components, the term "Terminal Position" refers to the physical location of the connection points on the component where external electrical connections can be made. These connection points, known as terminals, are typically used to attach wires, leads, or other components to the main body of the electronic component. The terminal position is important for ensuring proper connectivity and functionality of the component within a circuit. It is often specified in technical datasheets or component specifications to help designers and engineers understand how to properly integrate the component into their circuit designs.
QUAD
Terminal Form
Occurring at or forming the end of a series, succession, or the like; closing; concluding.
NO LEAD
Number of Functions
1
Supply Voltage
Supply voltage refers to the electrical potential difference provided to an electronic component or circuit. It is crucial for the proper operation of devices, as it powers their functions and determines performance characteristics. The supply voltage must be within specified limits to ensure reliability and prevent damage to components. Different electronic devices have specific supply voltage requirements, which can vary widely depending on their design and intended application.
1.2V
Terminal Pitch
The center distance from one pole to the next.
0.4mm
Base Part Number
The "Base Part Number" (BPN) in electronic components serves a similar purpose to the "Base Product Number." It refers to the primary identifier for a component that captures the essential characteristics shared by a group of similar components. The BPN provides a fundamental way to reference a family or series of components without specifying all the variations and specific details.
KSZ9893
JESD-30 Code
JESD-30 Code refers to a standardized descriptive designation system established by JEDEC for semiconductor-device packages. This system provides a systematic method for generating designators that convey essential information about the package's physical characteristics, such as size and shape, which aids in component identification and selection. By using JESD-30 codes, manufacturers and engineers can ensure consistency and clarity in the specification of semiconductor packages across various applications and industries.
S-PQCC-N64
Temperature Grade
Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.
COMMERCIAL
Data Rate
Data Rate is defined as the amount of data transmitted during a specified time period over a network. It is the speed at which data is transferred from one device to another or between a peripheral device and the computer. It is generally measured in Mega bits per second(Mbps) or Mega bytes per second(MBps).
1 Gbps
Screening Level
In electronic components, the term "Screening Level" refers to the level of testing and inspection that a component undergoes to ensure its reliability and performance. This process involves subjecting the component to various tests, such as temperature cycling, burn-in, and electrical testing, to identify any defects or weaknesses that could affect its functionality. The screening level is typically determined based on the application requirements and the criticality of the component in the system. Components that undergo higher screening levels are generally more reliable but may also be more expensive. Overall, the screening level helps to ensure that electronic components meet the necessary quality standards for their intended use.
TS 16949
Telecom IC Type
Telecom IC Type refers to integrated circuits specifically designed for telecommunications applications. These components facilitate various functions such as signal processing, data modulation and demodulation, and communication protocol handling. They can be used in devices like mobile phones, modems, and network equipment, ensuring reliable data transmission and reception. Telecom ICs support different standards and technologies, making them essential for modern communication systems.
ETHERNET TRANSCEIVER
Length
8mm
Height Seated (Max)
Height Seated (Max) is a parameter in electronic components that refers to the maximum allowable height of the component when it is properly seated or installed on a circuit board or within an enclosure. This specification is crucial for ensuring proper fit and alignment within the overall system design. Exceeding the maximum seated height can lead to mechanical interference, electrical shorts, or other issues that may impact the performance and reliability of the electronic device. Manufacturers provide this information to help designers and engineers select components that will fit within the designated space and function correctly in the intended application.
0.9mm
Width
8mm
RoHS Status
RoHS means “Restriction of Certain Hazardous Substances” in the “Hazardous Substances Directive” in electrical and electronic equipment.
ROHS3 Compliant

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KSZ9893R Functional Block Diagram

The following is the Block Diagram of KSZ9893R.

Internal Block Diagram.png

Internal Block Diagram

KSZ9893R Equivalent

Model number	Manufacturer	Description
AQR107-B0-EG-Y	Aquantia Co Ltd	Ethernet Transceiver, CMOS, PBGA104, FCCSP-104
KSZ8565RTXV	Microchip Technology Inc	Ethernet Transceiver
KSZ9563RNXI-TR	Microchip Technology Inc	Ethernet Transceiver
KSZ8895MQI	Microchip Technology Inc	Ethernet Transceiver, CMOS, PQFP128, LEAD FREE, PLASTIC, QFP-128
KSZ8895MLI	Microchip Technology Inc	Ethernet Transceiver, CMOS, PQFP128
KSZ8895MQXCTR	Microchip Technology Inc	DATACOM, ETHERNET TRANSCEIVER
KSZ8895RQ	Micrel Inc	Ethernet Transceiver, CMOS, PQFP128, LEAD FREE, PLASTIC, QFP-128
KSZ9031MNXCA	Microchip Technology Inc	DATACOM, ETHERNET TRANSCEIVER
VSC8488XJU-15	Microchip Technology Inc	Ethernet Transceiver, PBGA196, FCBGA-196
KSZ8864RMNI	Micrel Inc	Ethernet Transceiver, CMOS, 8 X 8 MM, LEAD FREE, QFN-64

KSZ9893R Applications

• Stand-alone 10/100/1000Mbps Ethernet switches

• VoIP infrastructure switches

• Broadband gateways/firewalls

• Wi-Fi access points

• Integrated DSL/cable modems

• Security/surveillance systems

• Industrial control/automation switches

• Networked measurement and control systems

KSZ9893R Package

The following diagrams show the KSZ9893R package.

Top View.png

Top View

Bottom View.png

Bottom View

Side View.png

Side View

Detail A.png

Detail A

KSZ9893R Package Marking

The following is the Package Marking of KSZ9893R.

Package Marking Information.png

Package Marking Information

KSZ9893R Recommended Land Pattern

The following diagram shows the KSZ9893R Recommended Land Pattern.

Recommended Land Pattern.png

Recommended Land Pattern

KSZ9893R Manufacturer

Microchip Technology Inc. is a leading provider of microcontroller and analog semiconductors, providing low-risk product development, lower total system cost and faster time to market for thousands of diverse customer applications worldwide. Headquartered in Chandler, Arizona, Microchip offers outstanding technical support along with dependable delivery and quality.

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Datasheet PDF

Download datasheets and manufacturer documentation for Microchip Technology KSZ9893RNXC.

PCN Design/Specification :
KSZ9893R 05/Jul/2019
KSZ9893R Datasheet 29/Nov/2018
ConflictMineralStatement :
Microchip-company-68.pdf
Datasheets :
KSZ9893R
KSZ9893RNX Brief

Frequently Asked Questions

What is the essential property of the KSZ9893R?

The KSZ9893R is a highly-integrated, IEEE 802.3 compliant networking device that incorporates a layer-2+ managed Gigabit Ethernet switch, two 10BASE-T/100BASE-TX/1000BASE-T physical layer transceivers (PHYs) and associated MAC units, and one MAC port with a configurable RGMII/MII/RMII interface for direct connection to a host processor/controller, another Ethernet switch, or an Ethernet PHY transceiver.

How does KSZ9893R configure the different modes of the device?

The KSZ9893R utilizes configuration strap pins to configure the device for different modes. These strap pins are configured by using external pull-up/down resistors to create a high or low state on the pins which are sampled at the end of a device power-up or software reset cycle.

Does KSZ9893R support full access to all device registers?

The KSZ9893R supports a slave mode SPI interface that provides complete access to all device registers via an SPI master device.

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KSZ9893RNXC

Microchip Technology

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