NE555 VS TS555 Power Consumption[Video]

The NE555 is a precision timing circuit capable of generating exact time delays or oscillation. In the time-delay or mono-stable mode of operation, the timed interval is regulated by a single external resistor and capacitor network. In the a-stable mode of operation, the frequency and duty cycle can be controlled independently using two external resistors and a single external capacitor. The output circuit of the NE555 can sink or source up to 200 milliamps of current. The operation is restricted to a voltage range of 5 to 15 volts. When powered by a 5-V supply, the output levels are compatible with TTL inputs.

The TS555 is a single CMOS timer with extremely low power consumption (Icc(TYP)TS555 = 110 A at VCC = +5 V versus Icc(TYP)NE555(a)= 3 mA) and high frequency (ff(max.) TS555 = 2.7 MHz versus f(max)NE555(a)= 0.1 MHz). Both monostable and astable modes maintain correct timing. The TS555 has lower supply current spikes during output transitions, allowing for the use of smaller decoupling capacitors than the bipolar NE555 (a). Timing capacitors can also be reduced thanks to the high input impedance (1012).

NE555 Features

• Timing From Microseconds to Hours

• Astable or Monostable Operation

• Adjustable Duty Cycle

• TTL-Compatible Output Can Sink or Source Up to 200 mA

• On Products Compliant to MIL-PRF-38535. All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

TS555 Features

• Very low power consumption:

      -110 μA typ at VCC= 5 V

      -90 μa typ at VCC= 3 V

• High maximum astable frequency of 2.7 MHz

• Pin-to-pin functionally-compatible with bipolar NE555(a)

• Wide voltage range: +2 V to +16 V

• Supply current spikes are reduced during output transitions

• High input impedance: 1012Ω

• Output compatible with TTL, CMOS, and logic MOS

NE555 Pinout

TS555 Pinout

NE555 Schematic

TS555 Schematic

NE555 Block Diagram

TS555 Block Diagram

NE555 Absolute Maximum Ratings

NE555 VS TS555 Applications

• NE555 Applications

• Fingerprint Biometrics

• Iris Biometrics

• RFID Reader

TS555 Applications

• The TS555 provides reduced supply current spikes during output transitions

• The TS555 is a single CMOS timer with low power consumption (Icc(TYP) TS555 = 110A at VCC=+5V versus Icc(TYP) NE555 = 3mA) and a high frequency (ff(max.) TS555 = 2.7MHz versus f(max.) NE555 = 0.1 MHz). As a result, whether in Monostable or Astable mode, timing is extremely precise. When compared to the bipolar NE555, the TS555 has lower supply current spikes during output transitions, allowing for the use of smaller decoupling capacitors. Due to the high input impedance (1012:9), timing capacitors can also be reduced.

• The CMOS versions of the TS555 have lower source/sink current parameters than the TTL versions of the NE555. (ff(max)TS555 = 2.7 MHz vs. f(max)NE555(a)=0.1 MHz). Both monostable and astable modes maintain correct timing. The TS555 has lower supply current spikes during output transitions, allowing for the use of smaller decoupling capacitors than the bipolar NE555 (a).

• NE555 Datasheet

• TS555 Datasheet

NE555 Package information

TS555 Package information